From nobody Fri May 17 12:13:04 2024 Delivered-To: importer2@patchew.org Received-SPF: pass (zohomail.com: domain of vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; envelope-from=linux-kernel-owner@vger.kernel.org; helo=vger.kernel.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass(p=reject dis=none) header.from=google.com ARC-Seal: i=1; a=rsa-sha256; t=1613776291; cv=none; d=zohomail.com; s=zohoarc; b=YBM3XhC5Vx/SDSeU9YkZ8zn9M1e42YCE2LK2a0aAWeLLmkWjlmZiVUrGrLEHno9t9BlCtSrk3Wl+B8a2t7nXzVYpzvBKqmEI0vVf9BgSOjQPXKM5p4kKHOaIMy4heTCoiQjh+oQPlED0LgepT9znUonljYm0StgDu7tGNhbA1yY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1613776291; h=Content-Type:Cc:Date:From:In-Reply-To:List-Id:MIME-Version:Message-ID:References:Sender:Subject:To; bh=vrPuPHAH+xMVowYwEx41742LbyJOqhVnyw71QmqUBj8=; b=P4ksKh+U/EAMnDwTa6Tdz8fUMSits7RdFrpKFNWCQgvAsFvtfTEWJWIQ3tQTG4MgHbRWvjEIJT6FDR0pBZSLTho7p6h/WiU3daO20fWHDZWU6idw4iBcMuTug4tiHKQYVOtuxr+WT1eP2ESINQ2X1oAZ+OmY+m9C3Z98js5S0Pk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass header.from= (p=reject dis=none) header.from= Return-Path: Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mx.zohomail.com with SMTP id 1613776290718878.7005377418102; Fri, 19 Feb 2021 15:11:30 -0800 (PST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229771AbhBSXKt (ORCPT ); Fri, 19 Feb 2021 18:10:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41660 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229620AbhBSXKj (ORCPT ); Fri, 19 Feb 2021 18:10:39 -0500 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0DD31C061574 for ; Fri, 19 Feb 2021 15:09:59 -0800 (PST) Received: by mail-yb1-xb4a.google.com with SMTP id u17so8550322ybi.10 for ; Fri, 19 Feb 2021 15:09:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:date:in-reply-to:message-id:mime-version:references:subject :from:cc; bh=vrPuPHAH+xMVowYwEx41742LbyJOqhVnyw71QmqUBj8=; b=PeNarQe7ZiwXQ4wW6LB9scuGCymurZMZzTDqG32azcLU8SZlTKOB58xAz3Bi0U3M3N lxpthe0e1LFpHrOSv7/Nl6N5XhR1WeqL8PxwOy1aRU8BbVM+sWMz9T71y2Mg9r+5+saR SuyG+gdIBZXAP0Pysat8Ranavjv0i+1oc9RKf/oPuOyuOXpYgEsUDno+AZOZYj2fcB0+ YS0ZyG5qkMjduyZiy4j29Q69qZh+YsHZ/pSzFYRsMa0JQgAuXGx0D+S1is5lXmZgRw7G 339rGK8zUdErRTmdi9VIwBh/QmrsiHFB2Ce/9dip6FHYmMdR6X5tU7NHqjOfCkMc1n0l pWsg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:date:in-reply-to:message-id:mime-version :references:subject:from:cc; bh=vrPuPHAH+xMVowYwEx41742LbyJOqhVnyw71QmqUBj8=; b=tbbGsICmHVj2Lr82cI3JPpRerLTRn322Wg0aorRqG/plAe8QQjTLS4lQGijGNqlaDR ++7qSwImWYHvbWw4JLXfDsL3tr8CfdqgdIxX6EAhiVrEmhXYz8OjgpPnPDT6FPdfO4mY AuFmvaL6BcqqtyBB1quh0R6TR6XUC/HcBO7Eh2gYbDCsKtn7FGiRv3fNmYr9jM/Hyuuj bdHwswkg++BFERfS/0kwdyuUusHMFoXjcB3XhkCaQGI4aaA5KdRKTN5ubF/go1Aepxn0 RKAzZwHjpMOLFn3ckrUdP+yZ3ySGW0JcbjIVzpH8kbZFa9SrcDDz4HtqSO6Y0YqxhpIS JU2Q== X-Gm-Message-State: AOAM530muvMPeGSxbAefrGnAWbu4vLgluiP3Y9WW4iOn8oE+manWHikz 8xUHIyMcjffGBhARbLNM05H1ctSHbciL X-Google-Smtp-Source: ABdhPJyM0ua3ElvZJE192OqKUKdrFKz/zW6QcCT6p3cm8Hvv6hJ31BKpdoPIt2iWnjsgulPHIlSdq8OoH5Fd Sender: "jiancai via sendgmr" X-Received: from jiancai.svl.corp.google.com ([2620:15c:2ce:0:6578:8d7f:50d0:55c8]) (user=jiancai job=sendgmr) by 2002:a25:1fc5:: with SMTP id f188mr17059740ybf.389.1613776198078; Fri, 19 Feb 2021 15:09:58 -0800 (PST) Date: Fri, 19 Feb 2021 15:08:13 -0800 In-Reply-To: <20210219201852.3213914-1-jiancai@google.com> Message-Id: <20210219230841.875875-1-jiancai@google.com> Mime-Version: 1.0 References: <20210219201852.3213914-1-jiancai@google.com> X-Mailer: git-send-email 2.30.0.617.g56c4b15f3c-goog Subject: [PATCH v4] ARM: Implement SLS mitigation From: Jian Cai Cc: ndesaulniers@google.com, manojgupta@google.com, llozano@google.com, clang-built-linux@googlegroups.com, Jian Cai , Nathan Chancellor , David Laight , Will Deacon , Russell King , Catalin Marinas , James Morris , "Serge E. Hallyn" , Arnd Bergmann , Masahiro Yamada , Kees Cook , Ard Biesheuvel , "=?UTF-8?q?Andreas=20F=C3=A4rber?=" , Ingo Molnar , Linus Walleij , Marc Zyngier , Andrew Morton , Mike Rapoport , Mark Rutland , David Brazdil , James Morse , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-security-module@vger.kernel.org To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-ZohoMail-DKIM: pass (identity @google.com) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch adds CONFIG_HARDEN_SLS_ALL that can be used to turn on -mharden-sls=3Dall, which mitigates the straight-line speculation vulnerability, speculative execution of the instruction following some unconditional jumps. Notice -mharden-sls=3D has other options as below, and this config turns on the strongest option. all: enable all mitigations against Straight Line Speculation that are impl= emented. none: disable all mitigations against Straight Line Speculation. retbr: enable the mitigation against Straight Line Speculation for RET and = BR instructions. blr: enable the mitigation against Straight Line Speculation for BLR instru= ctions. Links: https://reviews.llvm.org/D93221 https://reviews.llvm.org/D81404 https://developer.arm.com/support/arm-security-updates/speculative-processo= r-vulnerability/downloads/straight-line-speculation https://developer.arm.com/support/arm-security-updates/speculative-processo= r-vulnerability/frequently-asked-questions#SLS2 Suggested-by: Manoj Gupta Suggested-by: Nick Desaulniers Suggested-by: Nathan Chancellor Suggested-by: David Laight Suggested-by: Will Deacon Reviewed-by: Nathan Chancellor Signed-off-by: Jian Cai --- Changes v3 -> v4: Address Nathan's comment and replace def_bool with depends on in HARDEN_SLS_ALL. arch/arm/Makefile | 4 ++++ arch/arm/include/asm/vmlinux.lds.h | 4 ++++ arch/arm/kernel/vmlinux.lds.S | 1 + arch/arm64/Makefile | 4 ++++ arch/arm64/kernel/vmlinux.lds.S | 5 +++++ security/Kconfig.hardening | 10 ++++++++++ 6 files changed, 28 insertions(+) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 4aaec9599e8a..11d89ef32da9 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -48,6 +48,10 @@ CHECKFLAGS +=3D -D__ARMEL__ KBUILD_LDFLAGS +=3D -EL endif =20 +ifeq ($(CONFIG_HARDEN_SLS_ALL), y) +KBUILD_CFLAGS +=3D -mharden-sls=3Dall +endif + # # The Scalar Replacement of Aggregates (SRA) optimization pass in GCC 4.9 = and # later may result in code being generated that handles signed short and s= igned diff --git a/arch/arm/include/asm/vmlinux.lds.h b/arch/arm/include/asm/vmli= nux.lds.h index 4a91428c324d..c7f9717511ca 100644 --- a/arch/arm/include/asm/vmlinux.lds.h +++ b/arch/arm/include/asm/vmlinux.lds.h @@ -145,3 +145,7 @@ __edtcm_data =3D .; \ } \ . =3D __dtcm_start + SIZEOF(.data_dtcm); + +#define SLS_TEXT \ + ALIGN_FUNCTION(); \ + *(.text.__llvm_slsblr_thunk_*) diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index f7f4620d59c3..e71f2bc97bae 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S @@ -63,6 +63,7 @@ SECTIONS .text : { /* Real text segment */ _stext =3D .; /* Text and read-only data */ ARM_TEXT + SLS_TEXT } =20 #ifdef CONFIG_DEBUG_ALIGN_RODATA diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile index 90309208bb28..ca7299b356a9 100644 --- a/arch/arm64/Makefile +++ b/arch/arm64/Makefile @@ -34,6 +34,10 @@ $(warning LSE atomics not supported by binutils) endif endif =20 +ifeq ($(CONFIG_HARDEN_SLS_ALL), y) +KBUILD_CFLAGS +=3D -mharden-sls=3Dall +endif + cc_has_k_constraint :=3D $(call try-run,echo \ 'int main(void) { \ asm volatile("and w0, w0, %w0" :: "K" (4294967295)); \ diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.ld= s.S index 4c0b0c89ad59..f8912e42ffcd 100644 --- a/arch/arm64/kernel/vmlinux.lds.S +++ b/arch/arm64/kernel/vmlinux.lds.S @@ -93,6 +93,10 @@ jiffies =3D jiffies_64; #define TRAMP_TEXT #endif =20 +#define SLS_TEXT \ + ALIGN_FUNCTION(); \ + *(.text.__llvm_slsblr_thunk_*) + /* * The size of the PE/COFF section that covers the kernel image, which * runs from _stext to _edata, must be a round multiple of the PE/COFF @@ -144,6 +148,7 @@ SECTIONS HIBERNATE_TEXT TRAMP_TEXT *(.fixup) + SLS_TEXT *(.gnu.warning) . =3D ALIGN(16); *(.got) /* Global offset table */ diff --git a/security/Kconfig.hardening b/security/Kconfig.hardening index 269967c4fc1b..146b75a79d9e 100644 --- a/security/Kconfig.hardening +++ b/security/Kconfig.hardening @@ -121,6 +121,16 @@ choice =20 endchoice =20 +config HARDEN_SLS_ALL + bool "enable SLS vulnerability hardening" + default n + depends on $(cc-option,-mharden-sls=3Dall) + help + Enables straight-line speculation vulnerability hardening on ARM and AR= M64 + architectures. It inserts speculation barrier sequences (SB or DSB+ISB + depending on the target architecture) after RET and BR, and replacing + BLR with BL+BR sequence. + config GCC_PLUGIN_STRUCTLEAK_VERBOSE bool "Report forcefully initialized variables" depends on GCC_PLUGIN_STRUCTLEAK --=20 2.30.0.617.g56c4b15f3c-goog