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Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Aswath Govindraju --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 52 ++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am64-main.dtsi index a03b66456062..5a62a96c048c 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -5,6 +5,17 @@ * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti= .com/ */ =20 +#include +#include + +/ { + serdes_refclk: serdes-refclk { + #clock-cells =3D <0>; + compatible =3D "fixed-clock"; + clock-frequency =3D <100000000>; + }; +}; + &cbass_main { oc_sram: sram@70000000 { compatible =3D "mmio-sram"; @@ -184,6 +195,12 @@ reg =3D <0x4044 0x8>; #phy-cells =3D <1>; }; + + serdes_ln_ctrl: mux { + compatible =3D "mmio-mux"; + #mux-control-cells =3D <1>; + mux-reg-masks =3D <0x4080 0x3>; /* SERDES0 lane0 select */ + }; }; =20 main_uart0: serial@2800000 { @@ -477,6 +494,41 @@ }; }; =20 + serdes_wiz0: wiz@f000000 { + compatible =3D "ti,am64-wiz-10g"; + #address-cells =3D <1>; + #size-cells =3D <1>; + power-domains =3D <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>; + clocks =3D <&k3_clks 162 0>, <&k3_clks 162 1>, <&serdes_refclk>; + clock-names =3D "fck", "core_ref_clk", "ext_ref_clk"; + num-lanes =3D <1>; + #reset-cells =3D <1>; + #clock-cells =3D <1>; + ranges =3D <0x0f000000 0x0 0x0f000000 0x00010000>; + assigned-clocks =3D <&k3_clks 162 1>; + assigned-clock-parents =3D <&k3_clks 162 5>; + + serdes0: serdes@f000000 { + compatible =3D "ti,j721e-serdes-10g"; + reg =3D <0x0f000000 0x00010000>; + reg-names =3D "torrent_phy"; + resets =3D <&serdes_wiz0 0>; + reset-names =3D "torrent_reset"; + clocks =3D <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz0 TI_WIZ_PHY_EN_REFCLK>; + clock-names =3D "refclk", "phy_en_refclk"; + assigned-clocks =3D <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>, + <&serdes_wiz0 TI_WIZ_REFCLK_DIG>; + assigned-clock-parents =3D <&k3_clks 162 1>, + <&k3_clks 162 1>, + <&k3_clks 162 1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + #clock-cells =3D <1>; + }; + }; + cpts@39000000 { compatible =3D "ti,j721e-cpts"; reg =3D <0x0 0x39000000 0x0 0x400>; --=20 2.17.1 From nobody Tue Feb 10 19:34:23 2026 Delivered-To: importer2@patchew.org Received-SPF: pass (zohomail.com: domain of vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; envelope-from=linux-kernel-owner@vger.kernel.org; helo=vger.kernel.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail(p=quarantine dis=quarantine) header.from=ti.com ARC-Seal: i=1; a=rsa-sha256; t=1616140906; cv=none; d=zohomail.com; s=zohoarc; b=TsEb1gc9fEPM4ceumaKt6eiPVgbF5r1tsFrKlCyXeQQW5QtXwG1efWlGGjBrePsHbdELm3sww9ETqOdSKm/NUcHqV3ChOEpUjzgcK2AXrugBEaA1uw4e41SpSxjxv1eokOxEqyi9cTdUnmWO/WW7nsJk8v1KyEZkZbUKRmIvbS4= ARC-Message-Signature: i=1; a=rsa-sha256; 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Fri, 19 Mar 2021 03:00:49 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1616140852; bh=xTQJDTqnOBsJjzy5Hs+gAx5tqx5PWdpTz1zSae7Yy/E=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=L2cByV+Sd7yTJUGiMKOXX+ogR2Inj37dC+Pn+FsciuGO3UIDDKmnC2KOP6HEiiabP eV3Iz2NqB6QgWZGJwo13NpnDevzPB6L9/1ppyGKkIhnLlF51HgK3Riyu4wPWMOd4E9 tCmi+G7DsejUbKs25TPH5pserw1opYsAdwpXham8= From: Aswath Govindraju CC: Vignesh Raghavendra , Lokesh Vutla , Kishon Vijay Abraham I , Aswath Govindraju , Nishanth Menon , Tero Kristo , Rob Herring , , , Subject: [PATCH 2/2] arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port Date: Fri, 19 Mar 2021 13:30:38 +0530 Message-ID: <20210319080038.10521-3-a-govindraju@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210319080038.10521-1-a-govindraju@ti.com> References: <20210319080038.10521-1-a-govindraju@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Kishon Vijay Abraham I Enable USB Super-Speed HOST port. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Aswath Govindraju --- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 39 ++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/t= i/k3-am642-sk.dts index 3a5bee4b0b0c..f193ec630d18 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -5,6 +5,8 @@ =20 /dts-v1/; =20 +#include +#include #include #include #include "k3-am642.dtsi" @@ -85,6 +87,12 @@ >; }; =20 + main_usb0_pins_default: main-usb0-pins-default { + pinctrl-single,pins =3D < + AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ + >; + }; + main_i2c1_pins_default: main-i2c1-pins-default { pinctrl-single,pins =3D < AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */ @@ -230,6 +238,37 @@ disable-wp; }; =20 +&serdes_ln_ctrl { + idle-states =3D ; +}; + +&serdes_wiz0 { + status =3D "okay"; +}; + +&serdes0 { + serdes0_usb_link: phy@0 { + reg =3D <0>; + cdns,num-lanes =3D <1>; + #phy-cells =3D <0>; + cdns,phy-type =3D ; + resets =3D <&serdes_wiz0 1>; + }; +}; + +&usbss0 { + ti,vbus-divider; +}; + +&usb0 { + dr_mode =3D "host"; + maximum-speed =3D "super-speed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&main_usb0_pins_default>; + phys =3D <&serdes0_usb_link>; + phy-names =3D "cdns3,usb3-phy"; +}; + &cpsw3g { pinctrl-names =3D "default"; pinctrl-0 =3D <&mdio1_pins_default --=20 2.17.1