From nobody Wed Apr 24 06:50:19 2024 Delivered-To: importer2@patchew.org Received-SPF: pass (zohomail.com: domain of vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; envelope-from=linux-kernel-owner@vger.kernel.org; helo=vger.kernel.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mx.zohomail.com with SMTP id 1643646786112606.6030912234718; Mon, 31 Jan 2022 08:33:06 -0800 (PST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1380457AbiAaQdD (ORCPT ); Mon, 31 Jan 2022 11:33:03 -0500 Received: from relay5-d.mail.gandi.net ([217.70.183.197]:50565 "EHLO relay5-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379566AbiAaQc6 (ORCPT ); Mon, 31 Jan 2022 11:32:58 -0500 Received: (Authenticated sender: foss@0leil.net) by mail.gandi.net (Postfix) with ESMTPSA id 160CC1C0009; Mon, 31 Jan 2022 16:32:52 +0000 (UTC) From: quentin.schulz@theobroma-systems.com Cc: mturquette@baylibre.com, sboyd@kernel.org, heiko@sntech.de, andriy.shevchenko@linux.intel.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Quentin Schulz , stable@vger.kernel.org, Quentin Schulz Subject: [PATCH] clk: rockchip: re-add rational best approximation algorithm to the fractional divider Date: Mon, 31 Jan 2022 17:32:24 +0100 Message-Id: <20220131163224.708002-1-quentin.schulz@theobroma-systems.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-ZM-MESSAGEID: 1643646789050100001 Content-Type: text/plain; charset="utf-8" From: Quentin Schulz In commit 4e7cf74fa3b2 ("clk: fractional-divider: Export approximation algorithm to the CCF users"), the code handling the rational best approximation algorithm was replaced by a call to the core clk_fractional_divider_general_approximation function which did the same thing back then. However, in commit 82f53f9ee577 ("clk: fractional-divider: Introduce POWER_OF_TWO_PS flag"), this common code was made conditional on CLK_FRAC_DIVIDER_POWER_OF_TWO_PS flag which was not added back to the rockchip clock driver. This broke the ltk050h3146w-a2 MIPI DSI display present on a PX30-based downstream board. Let's add the flag to the fractional divider flags so that the original and intended behavior is brought back to the rockchip clock drivers. Fixes: 82f53f9ee577 ("clk: fractional-divider: Introduce POWER_OF_TWO_PS fl= ag") Cc: stable@vger.kernel.org Cc: Quentin Schulz Signed-off-by: Quentin Schulz --- drivers/clk/rockchip/clk.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c index b7be7e11b0df..bb8a844309bf 100644 --- a/drivers/clk/rockchip/clk.c +++ b/drivers/clk/rockchip/clk.c @@ -180,6 +180,7 @@ static void rockchip_fractional_approximation(struct cl= k_hw *hw, unsigned long rate, unsigned long *parent_rate, unsigned long *m, unsigned long *n) { + struct clk_fractional_divider *fd =3D to_clk_fd(hw); unsigned long p_rate, p_parent_rate; struct clk_hw *p_parent; =20 @@ -190,6 +191,8 @@ static void rockchip_fractional_approximation(struct cl= k_hw *hw, *parent_rate =3D p_parent_rate; } =20 + fd->flags |=3D CLK_FRAC_DIVIDER_POWER_OF_TWO_PS; + clk_fractional_divider_general_approximation(hw, rate, parent_rate, m, n); } =20 --=20 2.34.1