Introduce new callback that can provide information
about NonDiscoverableDevices to the relevant drivers and libraries.
Extend ArmadaBoardDescLib with new structures (MV_BOARD_AHCI_DESC/
MV_BOARD_SDMMC_DESC/MV_BOARD_XHCI_DESC) for holding board specific
data.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 180 ++++++++++++++++++++
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 2 +
Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 31 ++++
Silicon/Marvell/Include/Protocol/BoardDesc.h | 24 +++
4 files changed, 237 insertions(+)
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index 86bddad..44d159e 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -37,6 +37,183 @@ MV_BOARD_DESC *mBoardDescInstance;
STATIC
EFI_STATUS
+MvBoardDescAhciGet (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_AHCI_DESC **AhciDesc
+ )
+{
+ UINT8 *AhciDeviceTable, AhciCount;
+ UINTN AhciDeviceTableSize, AhciIndex, Index;
+ MV_BOARD_AHCI_DESC *BoardDesc;
+ MV_SOC_AHCI_DESC *SoCDesc;
+ EFI_STATUS Status;
+
+ /* Get SoC data about all available AHCI controllers */
+ Status = ArmadaSoCDescAhciGet (&SoCDesc, &AhciCount);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ /* Obtain table with enabled AHCI controllers */
+ AhciDeviceTable = (UINT8 *)PcdGetPtr (PcdPciEAhci);
+ if (AhciDeviceTable == NULL) {
+ /* No AHCI on platform */
+ return EFI_SUCCESS;
+ }
+
+ AhciDeviceTableSize = PcdGetSize (PcdPciEAhci);
+
+ /* Check if PCD with AHCI controllers is correctly defined */
+ if (AhciDeviceTableSize > AhciCount) {
+ DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEAhci format\n", __FUNCTION__));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ /* Allocate and fill board description */
+ BoardDesc = AllocateZeroPool (AhciDeviceTableSize * sizeof (MV_BOARD_AHCI_DESC));
+ if (BoardDesc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ AhciIndex = 0;
+ for (Index = 0; Index < AhciDeviceTableSize; Index++) {
+ if (!MVHW_DEV_ENABLED (Ahci, Index)) {
+ DEBUG ((DEBUG_INFO, "%a: Skip Ahci controller %d\n", __FUNCTION__, Index));
+ continue;
+ }
+
+ BoardDesc[AhciIndex].SoC = &SoCDesc[Index];
+ AhciIndex++;
+ }
+
+ BoardDesc->AhciDevCount = AhciIndex;
+
+ *AhciDesc = BoardDesc;
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+MvBoardDescSdMmcGet (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
+ )
+{
+ UINT8 *SdMmcDeviceTable, SdMmcCount;
+ UINTN SdMmcDeviceTableSize, SdMmcIndex, Index;
+ MV_BOARD_SDMMC_DESC *BoardDesc;
+ MV_SOC_SDMMC_DESC *SoCDesc;
+ EFI_STATUS Status;
+
+ /* Get SoC data about all available SDMMC controllers */
+ Status = ArmadaSoCDescSdMmcGet (&SoCDesc, &SdMmcCount);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ /* Obtain table with enabled SDMMC controllers */
+ SdMmcDeviceTable = (UINT8 *)PcdGetPtr (PcdPciESdhci);
+ if (SdMmcDeviceTable == NULL) {
+ /* No SDMMC on platform */
+ return EFI_SUCCESS;
+ }
+
+ SdMmcDeviceTableSize = PcdGetSize (PcdPciESdhci);
+
+ /* Check if PCD with SDMMC controllers is correctly defined */
+ if (SdMmcDeviceTableSize > SdMmcCount) {
+ DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciESdhci format\n", __FUNCTION__));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ /* Allocate and fill board description */
+ BoardDesc = AllocateZeroPool (SdMmcDeviceTableSize * sizeof (MV_BOARD_SDMMC_DESC));
+ if (BoardDesc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ SdMmcIndex = 0;
+ for (Index = 0; Index < SdMmcDeviceTableSize; Index++) {
+ if (!MVHW_DEV_ENABLED (SdMmc, Index)) {
+ DEBUG ((DEBUG_INFO, "%a: Skip SdMmc controller %d\n", __FUNCTION__, Index));
+ continue;
+ }
+
+ BoardDesc[SdMmcIndex].SoC = &SoCDesc[Index];
+ SdMmcIndex++;
+ }
+
+ BoardDesc->SdMmcDevCount = SdMmcIndex;
+
+ *SdMmcDesc = BoardDesc;
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+MvBoardDescXhciGet (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_XHCI_DESC **XhciDesc
+ )
+{
+ UINT8 *XhciDeviceTable, XhciCount;
+ UINTN XhciDeviceTableSize, XhciIndex, Index;
+ MV_BOARD_XHCI_DESC *BoardDesc;
+ MV_SOC_XHCI_DESC *SoCDesc;
+ EFI_STATUS Status;
+
+ /* Get SoC data about all available XHCI controllers */
+ Status = ArmadaSoCDescXhciGet (&SoCDesc, &XhciCount);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ /* Obtain table with enabled XHCI controllers */
+ XhciDeviceTable = (UINT8 *)PcdGetPtr (PcdPciEXhci);
+ if (XhciDeviceTable == NULL) {
+ /* No XHCI on platform */
+ return EFI_SUCCESS;
+ }
+
+ XhciDeviceTableSize = PcdGetSize (PcdPciEXhci);
+
+ /* Check if PCD with XHCI controllers is correctly defined */
+ if (XhciDeviceTableSize > XhciCount) {
+ DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEXhci format\n", __FUNCTION__));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ /* Allocate and fill board description */
+ BoardDesc = AllocateZeroPool (XhciDeviceTableSize * sizeof (MV_BOARD_XHCI_DESC));
+ if (BoardDesc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ XhciIndex = 0;
+ for (Index = 0; Index < XhciDeviceTableSize; Index++) {
+ if (!MVHW_DEV_ENABLED (Xhci, Index)) {
+ DEBUG ((DEBUG_INFO, "%a: Skip Xhci controller %d\n", __FUNCTION__, Index));
+ continue;
+ }
+
+ BoardDesc[XhciIndex].SoC = &SoCDesc[Index];
+ XhciIndex++;
+ }
+
+ BoardDesc->XhciDevCount = XhciIndex;
+
+ *XhciDesc = BoardDesc;
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
MvBoardDescPp2Get (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_PP2_DESC **Pp2Desc
@@ -197,6 +374,9 @@ MvBoardDescInitProtocol (
IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol
)
{
+ BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
+ BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
+ BoardDescProtocol->BoardDescXhciGet = MvBoardDescXhciGet;
BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
BoardDescProtocol->BoardDescFree = MvBoardDescFree;
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
index c7d5fe2..fe819ac 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
@@ -60,6 +60,8 @@
gMarvellTokenSpaceGuid.PcdPp2Controllers
gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
gMarvellTokenSpaceGuid.PcdUtmiPortType
+ gMarvellTokenSpaceGuid.PcdPciEAhci
+ gMarvellTokenSpaceGuid.PcdPciESdhci
gMarvellTokenSpaceGuid.PcdPciEXhci
[Depex]
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index 78cf698..938d283 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -17,6 +17,37 @@
#include <Library/ArmadaSoCDescLib.h>
//
+// NonDiscoverableDevices per-board description
+//
+
+//
+// AHCI devices per-board description
+//
+typedef struct {
+ MV_SOC_AHCI_DESC *SoC;
+ UINT8 AhciDevCount;
+} MV_BOARD_AHCI_DESC;
+
+//
+// SDMMC devices per-board description
+//
+// TODO - Extend structure with entire
+// ports description instead of PCDs.
+//
+typedef struct {
+ MV_SOC_SDMMC_DESC *SoC;
+ UINT8 SdMmcDevCount;
+} MV_BOARD_SDMMC_DESC;
+
+//
+// XHCI devices per-board description
+//
+typedef struct {
+ MV_SOC_XHCI_DESC *SoC;
+ UINT8 XhciDevCount;
+} MV_BOARD_XHCI_DESC;
+
+//
// PP2 NIC devices per-board description
//
// TODO - Extend structure with entire
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
index 114a0ec..a59ade5 100644
--- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -43,6 +43,27 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL;
typedef
EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_AHCI_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_AHCI_DESC **AhciDesc
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_SDMMC_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_XHCI_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_XHCI_DESC **XhciDesc
+ );
+
+typedef
+EFI_STATUS
(EFIAPI *MV_BOARD_DESC_PP2_GET) (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_PP2_DESC **Pp2Desc
@@ -62,6 +83,9 @@ VOID
);
struct _MARVELL_BOARD_DESC_PROTOCOL {
+ MV_BOARD_DESC_AHCI_GET BoardDescAhciGet;
+ MV_BOARD_DESC_SDMMC_GET BoardDescSdMmcGet;
+ MV_BOARD_DESC_XHCI_GET BoardDescXhciGet;
MV_BOARD_DESC_PP2_GET BoardDescPp2Get;
MV_BOARD_DESC_UTMI_GET BoardDescUtmiGet;
MV_BOARD_DESC_FREE BoardDescFree;
--
2.7.4
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On Fri, Jun 08, 2018 at 05:34:10PM +0200, Marcin Wojtas wrote: > Introduce new callback that can provide information > about NonDiscoverableDevices to the relevant drivers and libraries. > > Extend ArmadaBoardDescLib with new structures (MV_BOARD_AHCI_DESC/ > MV_BOARD_SDMMC_DESC/MV_BOARD_XHCI_DESC) for holding board specific > data. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas <mw@semihalf.com> > Reviewed-by: Hua Jing <jinghua@marvell.com> > --- > Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 180 ++++++++++++++++++++ > Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 2 + > Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 31 ++++ > Silicon/Marvell/Include/Protocol/BoardDesc.h | 24 +++ > 4 files changed, 237 insertions(+) > > diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c > index 86bddad..44d159e 100644 > --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c > +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c > @@ -37,6 +37,183 @@ MV_BOARD_DESC *mBoardDescInstance; > > STATIC > EFI_STATUS > +MvBoardDescAhciGet ( > + IN MARVELL_BOARD_DESC_PROTOCOL *This, > + IN OUT MV_BOARD_AHCI_DESC **AhciDesc > + ) > +{ > + UINT8 *AhciDeviceTable, AhciCount; UINTN for count please. > + UINTN AhciDeviceTableSize, AhciIndex, Index; > + MV_BOARD_AHCI_DESC *BoardDesc; > + MV_SOC_AHCI_DESC *SoCDesc; > + EFI_STATUS Status; > + > + /* Get SoC data about all available AHCI controllers */ > + Status = ArmadaSoCDescAhciGet (&SoCDesc, &AhciCount); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + /* Obtain table with enabled AHCI controllers */ > + AhciDeviceTable = (UINT8 *)PcdGetPtr (PcdPciEAhci); Is that cast needed? > + if (AhciDeviceTable == NULL) { > + /* No AHCI on platform */ > + return EFI_SUCCESS; > + } > + > + AhciDeviceTableSize = PcdGetSize (PcdPciEAhci); > + > + /* Check if PCD with AHCI controllers is correctly defined */ > + if (AhciDeviceTableSize > AhciCount) { > + DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEAhci format\n", __FUNCTION__)); > + return EFI_INVALID_PARAMETER; > + } > + > + /* Allocate and fill board description */ > + BoardDesc = AllocateZeroPool (AhciDeviceTableSize * sizeof (MV_BOARD_AHCI_DESC)); > + if (BoardDesc == NULL) { > + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); > + return EFI_OUT_OF_RESOURCES; > + } > + > + AhciIndex = 0; > + for (Index = 0; Index < AhciDeviceTableSize; Index++) { > + if (!MVHW_DEV_ENABLED (Ahci, Index)) { if (AhciDeviceTable[Index] != MVHW_DEV_ENABLED) { > + DEBUG ((DEBUG_INFO, "%a: Skip Ahci controller %d\n", __FUNCTION__, Index)); > + continue; > + } > + > + BoardDesc[AhciIndex].SoC = &SoCDesc[Index]; > + AhciIndex++; > + } > + > + BoardDesc->AhciDevCount = AhciIndex; > + > + *AhciDesc = BoardDesc; > + > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > +MvBoardDescSdMmcGet ( > + IN MARVELL_BOARD_DESC_PROTOCOL *This, > + IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc > + ) > +{ > + UINT8 *SdMmcDeviceTable, SdMmcCount; UINTN for count please. > + UINTN SdMmcDeviceTableSize, SdMmcIndex, Index; > + MV_BOARD_SDMMC_DESC *BoardDesc; > + MV_SOC_SDMMC_DESC *SoCDesc; > + EFI_STATUS Status; > + > + /* Get SoC data about all available SDMMC controllers */ > + Status = ArmadaSoCDescSdMmcGet (&SoCDesc, &SdMmcCount); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + /* Obtain table with enabled SDMMC controllers */ > + SdMmcDeviceTable = (UINT8 *)PcdGetPtr (PcdPciESdhci); > + if (SdMmcDeviceTable == NULL) { > + /* No SDMMC on platform */ > + return EFI_SUCCESS; > + } > + > + SdMmcDeviceTableSize = PcdGetSize (PcdPciESdhci); > + > + /* Check if PCD with SDMMC controllers is correctly defined */ > + if (SdMmcDeviceTableSize > SdMmcCount) { > + DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciESdhci format\n", __FUNCTION__)); > + return EFI_INVALID_PARAMETER; > + } > + > + /* Allocate and fill board description */ > + BoardDesc = AllocateZeroPool (SdMmcDeviceTableSize * sizeof (MV_BOARD_SDMMC_DESC)); > + if (BoardDesc == NULL) { > + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); > + return EFI_OUT_OF_RESOURCES; > + } > + > + SdMmcIndex = 0; > + for (Index = 0; Index < SdMmcDeviceTableSize; Index++) { > + if (!MVHW_DEV_ENABLED (SdMmc, Index)) { if (SdMmcDeviceTable[Index] != MVHW_DEV_ENABLED) { > + DEBUG ((DEBUG_INFO, "%a: Skip SdMmc controller %d\n", __FUNCTION__, Index)); > + continue; > + } > + > + BoardDesc[SdMmcIndex].SoC = &SoCDesc[Index]; > + SdMmcIndex++; > + } > + > + BoardDesc->SdMmcDevCount = SdMmcIndex; > + > + *SdMmcDesc = BoardDesc; > + > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > +MvBoardDescXhciGet ( > + IN MARVELL_BOARD_DESC_PROTOCOL *This, > + IN OUT MV_BOARD_XHCI_DESC **XhciDesc > + ) > +{ > + UINT8 *XhciDeviceTable, XhciCount; UINTN for count. > + UINTN XhciDeviceTableSize, XhciIndex, Index; > + MV_BOARD_XHCI_DESC *BoardDesc; > + MV_SOC_XHCI_DESC *SoCDesc; > + EFI_STATUS Status; > + > + /* Get SoC data about all available XHCI controllers */ > + Status = ArmadaSoCDescXhciGet (&SoCDesc, &XhciCount); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + /* Obtain table with enabled XHCI controllers */ > + XhciDeviceTable = (UINT8 *)PcdGetPtr (PcdPciEXhci); > + if (XhciDeviceTable == NULL) { > + /* No XHCI on platform */ > + return EFI_SUCCESS; > + } > + > + XhciDeviceTableSize = PcdGetSize (PcdPciEXhci); > + > + /* Check if PCD with XHCI controllers is correctly defined */ > + if (XhciDeviceTableSize > XhciCount) { > + DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEXhci format\n", __FUNCTION__)); > + return EFI_INVALID_PARAMETER; > + } > + > + /* Allocate and fill board description */ > + BoardDesc = AllocateZeroPool (XhciDeviceTableSize * sizeof (MV_BOARD_XHCI_DESC)); > + if (BoardDesc == NULL) { > + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); > + return EFI_OUT_OF_RESOURCES; > + } > + > + XhciIndex = 0; > + for (Index = 0; Index < XhciDeviceTableSize; Index++) { > + if (!MVHW_DEV_ENABLED (Xhci, Index)) { if (XhciDeviceTable[Index] != MVHW_DEV_ENABLED) { > + DEBUG ((DEBUG_INFO, "%a: Skip Xhci controller %d\n", __FUNCTION__, Index)); > + continue; > + } > + > + BoardDesc[XhciIndex].SoC = &SoCDesc[Index]; > + XhciIndex++; > + } > + > + BoardDesc->XhciDevCount = XhciIndex; > + > + *XhciDesc = BoardDesc; > + > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > MvBoardDescPp2Get ( > IN MARVELL_BOARD_DESC_PROTOCOL *This, > IN OUT MV_BOARD_PP2_DESC **Pp2Desc > @@ -197,6 +374,9 @@ MvBoardDescInitProtocol ( > IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol > ) > { > + BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet; > + BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet; > + BoardDescProtocol->BoardDescXhciGet = MvBoardDescXhciGet; This may be slightly anal, but could you sort the device names alpabetically? > BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get; > BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet; > BoardDescProtocol->BoardDescFree = MvBoardDescFree; > diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf > index c7d5fe2..fe819ac 100644 > --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf > +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf > @@ -60,6 +60,8 @@ > gMarvellTokenSpaceGuid.PcdPp2Controllers > gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled > gMarvellTokenSpaceGuid.PcdUtmiPortType > + gMarvellTokenSpaceGuid.PcdPciEAhci > + gMarvellTokenSpaceGuid.PcdPciESdhci > gMarvellTokenSpaceGuid.PcdPciEXhci > > [Depex] > diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h > index 78cf698..938d283 100644 > --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h > +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h > @@ -17,6 +17,37 @@ > #include <Library/ArmadaSoCDescLib.h> > > // > +// NonDiscoverableDevices per-board description > +// > + > +// > +// AHCI devices per-board description > +// > +typedef struct { > + MV_SOC_AHCI_DESC *SoC; > + UINT8 AhciDevCount; There is no benefit to using UINT8 here (and several drawbacks). Please use UINTN throughout. > +} MV_BOARD_AHCI_DESC; > + > +// > +// SDMMC devices per-board description > +// > +// TODO - Extend structure with entire > +// ports description instead of PCDs. > +// > +typedef struct { > + MV_SOC_SDMMC_DESC *SoC; > + UINT8 SdMmcDevCount; > +} MV_BOARD_SDMMC_DESC; > + > +// > +// XHCI devices per-board description > +// > +typedef struct { > + MV_SOC_XHCI_DESC *SoC; > + UINT8 XhciDevCount; > +} MV_BOARD_XHCI_DESC; > + > +// > // PP2 NIC devices per-board description > // > // TODO - Extend structure with entire > diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h > index 114a0ec..a59ade5 100644 > --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h > +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h > @@ -43,6 +43,27 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL; > > typedef > EFI_STATUS > +(EFIAPI *MV_BOARD_DESC_AHCI_GET) ( > + IN MARVELL_BOARD_DESC_PROTOCOL *This, > + IN OUT MV_BOARD_AHCI_DESC **AhciDesc > + ); > + > +typedef > +EFI_STATUS > +(EFIAPI *MV_BOARD_DESC_SDMMC_GET) ( > + IN MARVELL_BOARD_DESC_PROTOCOL *This, > + IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc > + ); > + > +typedef > +EFI_STATUS > +(EFIAPI *MV_BOARD_DESC_XHCI_GET) ( > + IN MARVELL_BOARD_DESC_PROTOCOL *This, > + IN OUT MV_BOARD_XHCI_DESC **XhciDesc > + ); > + > +typedef > +EFI_STATUS > (EFIAPI *MV_BOARD_DESC_PP2_GET) ( > IN MARVELL_BOARD_DESC_PROTOCOL *This, > IN OUT MV_BOARD_PP2_DESC **Pp2Desc > @@ -62,6 +83,9 @@ VOID > ); > > struct _MARVELL_BOARD_DESC_PROTOCOL { > + MV_BOARD_DESC_AHCI_GET BoardDescAhciGet; > + MV_BOARD_DESC_SDMMC_GET BoardDescSdMmcGet; > + MV_BOARD_DESC_XHCI_GET BoardDescXhciGet; Insert alphabetically? / Leif > MV_BOARD_DESC_PP2_GET BoardDescPp2Get; > MV_BOARD_DESC_UTMI_GET BoardDescUtmiGet; > MV_BOARD_DESC_FREE BoardDescFree; > -- > 2.7.4 > _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
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