Add the drivers, library resolutions and PCD settings to enable RTC
support on DeveloperBox. Also, update PlatformDxe to register the
non-discoverable device handles for both I2C controllers.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 8 ++-
Platform/Socionext/DeveloperBox/DeveloperBox.fdf | 5 ++
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c | 76 +++++++++++++++++---
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 6 +-
Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h | 8 +++
Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c | 4 ++
6 files changed, 96 insertions(+), 11 deletions(-)
diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
index af978db2c034..cd4eb79b35bf 100644
--- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
+++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
@@ -446,8 +446,7 @@ [Components.common]
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf {
<LibraryClasses>
- ## TODO
- RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf
+ RealTimeClockLib|Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
}
MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
@@ -623,3 +622,8 @@ [Components.common]
MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
+
+ #
+ # I2C
+ #
+ Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf
diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf b/Platform/Socionext/DeveloperBox/DeveloperBox.fdf
index 6cc523fac4f3..8443986fc3e7 100644
--- a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf
+++ b/Platform/Socionext/DeveloperBox/DeveloperBox.fdf
@@ -229,6 +229,11 @@ [FV.FvMain]
SECTION UI = "Pkcs7TestRoot"
}
+ #
+ # I2C
+ #
+ INF Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf
+
[FV.FVMAIN_COMPACT]
FvAlignment = 16
BlockSize = 0x10000
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c
index 9639ffffc09f..070e6be92edd 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c
@@ -62,27 +62,61 @@ STATIC EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR mNetsecDesc[] = {
}
};
+STATIC EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR mI2c0Desc[] = {
+ {
+ ACPI_ADDRESS_SPACE_DESCRIPTOR, // Desc
+ sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3, // Len
+ ACPI_ADDRESS_SPACE_TYPE_MEM, // ResType
+ 0, // GenFlag
+ 0, // SpecificFlag
+ 32, // AddrSpaceGranularity
+ SYNQUACER_I2C0_BASE, // AddrRangeMin
+ SYNQUACER_I2C0_BASE + SYNQUACER_I2C0_SIZE - 1, // AddrRangeMax
+ 0, // AddrTranslationOffset
+ SYNQUACER_I2C0_SIZE, // AddrLen
+ }, {
+ ACPI_END_TAG_DESCRIPTOR // Desc
+ }
+};
+
+STATIC EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR mI2c1Desc[] = {
+ {
+ ACPI_ADDRESS_SPACE_DESCRIPTOR, // Desc
+ sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3, // Len
+ ACPI_ADDRESS_SPACE_TYPE_MEM, // ResType
+ 0, // GenFlag
+ 0, // SpecificFlag
+ 32, // AddrSpaceGranularity
+ SYNQUACER_I2C1_BASE, // AddrRangeMin
+ SYNQUACER_I2C1_BASE + SYNQUACER_I2C1_SIZE - 1, // AddrRangeMax
+ 0, // AddrTranslationOffset
+ SYNQUACER_I2C1_SIZE, // AddrLen
+ }, {
+ ACPI_END_TAG_DESCRIPTOR // Desc
+ }
+};
+
STATIC
EFI_STATUS
-RegisterNetsec (
- VOID
+RegisterDevice (
+ IN EFI_GUID *TypeGuid,
+ IN EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc,
+ OUT EFI_HANDLE *Handle
)
{
NON_DISCOVERABLE_DEVICE *Device;
EFI_STATUS Status;
- EFI_HANDLE Handle;
Device = (NON_DISCOVERABLE_DEVICE *)AllocateZeroPool (sizeof (*Device));
if (Device == NULL) {
return EFI_OUT_OF_RESOURCES;
}
- Device->Type = &gNetsecNonDiscoverableDeviceGuid;
+ Device->Type = TypeGuid;
Device->DmaType = NonDiscoverableDeviceDmaTypeNonCoherent;
- Device->Resources = mNetsecDesc;
+ Device->Resources = Desc;
- Handle = NULL;
- Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
+ Status = gBS->InstallMultipleProtocolInterfaces (Handle,
&gEdkiiNonDiscoverableDeviceProtocolGuid, Device,
NULL);
if (EFI_ERROR (Status)) {
@@ -106,6 +140,7 @@ PlatformDxeEntryPoint (
EFI_STATUS Status;
VOID *Dtb;
UINTN DtbSize;
+ EFI_HANDLE Handle;
Dtb = NULL;
Status = DtPlatformLoadDtb (&Dtb, &DtbSize);
@@ -118,5 +153,30 @@ PlatformDxeEntryPoint (
Status));
}
- return RegisterNetsec ();
+ Handle = NULL;
+ Status = RegisterDevice (&gNetsecNonDiscoverableDeviceGuid, mNetsecDesc,
+ &Handle);
+ ASSERT_EFI_ERROR (Status);
+
+ Handle = NULL;
+ Status = RegisterDevice (&gSynQuacerNonDiscoverableRuntimeI2cMasterGuid,
+ mI2c0Desc, &Handle);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Install the PCF8563 I2C Master protocol on this handle so the RTC driver
+ // can identify it as the I2C master it can invoke directly, rather than
+ // through the I2C driver stack (which cannot be used at runtime)
+ //
+ Status = gBS->InstallProtocolInterface (&Handle,
+ &gPcf8563RealTimeClockLibI2cMasterProtolGuid,
+ EFI_NATIVE_INTERFACE, NULL);
+ ASSERT_EFI_ERROR (Status);
+
+ Handle = NULL;
+ Status = RegisterDevice (&gSynQuacerNonDiscoverableI2cMasterGuid, mI2c1Desc,
+ &Handle);
+ ASSERT_EFI_ERROR (Status);
+
+ return EFI_SUCCESS;
}
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
index 25e6248f1c61..478e0c7d33e9 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
@@ -29,6 +29,7 @@ [Packages]
EmbeddedPkg/EmbeddedPkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
+ Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.dec
Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.dec
Silicon/Socionext/SynQuacer/SynQuacer.dec
@@ -43,9 +44,12 @@ [LibraryClasses]
[Guids]
gFdtTableGuid
gNetsecNonDiscoverableDeviceGuid
+ gSynQuacerNonDiscoverableI2cMasterGuid
+ gSynQuacerNonDiscoverableRuntimeI2cMasterGuid
[Protocols]
- gEdkiiNonDiscoverableDeviceProtocolGuid ## PRODUCES
+ gEdkiiNonDiscoverableDeviceProtocolGuid ## PRODUCES
+ gPcf8563RealTimeClockLibI2cMasterProtolGuid ## PRODUCES
[FixedPcd]
gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase
diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
index f29a35809bac..3c7bd58866cc 100644
--- a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
+++ b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
@@ -42,6 +42,14 @@
#define SYNQUACER_GPIO_BASE 0x51000000
#define SYNQUACER_GPIO_SIZE SIZE_4KB
+// I2C0 block
+#define SYNQUACER_I2C0_BASE 0x51200000
+#define SYNQUACER_I2C0_SIZE SIZE_4KB
+
+// I2C1 block
+#define SYNQUACER_I2C1_BASE 0x51210000
+#define SYNQUACER_I2C1_SIZE SIZE_4KB
+
// eMMC(SDH30)
#define SYNQUACER_EMMC_BASE 0x52300000
#define SYNQUACER_EMMC_BASE_SZ SIZE_4KB
diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c
index 63c441872da7..38cb731f92cb 100644
--- a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c
+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c
@@ -82,6 +82,10 @@ STATIC CONST ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[] = {
ARM_CACHED_DEVICE_REGION (FixedPcdGet32 (PcdNetsecEepromBase),
SYNQUACER_EEPROM_BASE_SZ),
+ // SynQuacer I2C
+ ARM_DEVICE_REGION (SYNQUACER_I2C0_BASE, SYNQUACER_I2C0_SIZE),
+ ARM_DEVICE_REGION (SYNQUACER_I2C1_BASE, SYNQUACER_I2C1_SIZE),
+
// SynQuacer NETSEC
ARM_DEVICE_REGION (SYNQUACER_NETSEC1_BASE, SYNQUACER_NETSEC1_BASE_SZ),
--
2.11.0
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